Ferroelectric-Gate Field Effect Transistor Memories: Device by Byung-Eun Park, Hiroshi Ishiwara, Masanori Okuyama, Shigeki

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By Byung-Eun Park, Hiroshi Ishiwara, Masanori Okuyama, Shigeki Sakai, Sung-Min Yoon

This e-book offers complete assurance of the fabrics features, method applied sciences, and gadget operations for reminiscence field-effect transistors making use of inorganic or natural ferroelectric skinny motion pictures. This transistor-type ferroelectric reminiscence has fascinating primary machine physics and very likely huge commercial effect.

Among a number of the purposes of ferroelectric skinny movies, the advance of nonvolatile ferroelectric random entry reminiscence (FeRAM) has advanced so much actively because the overdue Nineteen Eighties and has completed modest mass construction degrees for particular purposes when you consider that 1995. There are kinds of reminiscence cells in ferroelectric nonvolatile thoughts. One is the capacitor-type FeRAM and the opposite is the field-effect transistor (FET)-type FeRAM. even supposing the FET-type FeRAM claims final scalability and nondestructive readout features, the capacitor-type FeRAMs were the most curiosity for the key semiconductor reminiscence businesses, as the ferroelectric FET has deadly handicaps of cross-talk for random accessibility and brief retention time.

This publication goals to supply readers with the improvement heritage, technical matters, fabrication methodologies, and promising functions of FET-type ferroelectric reminiscence units, featuring a accomplished evaluate of prior, current, and destiny applied sciences. the themes mentioned will bring about additional advances in large-area electronics carried out on glass or plastic substrates in addition to in traditional Si electronics.

The ebook consists of chapters written by way of top researchers in ferroelectric fabrics and comparable gadget applied sciences, together with oxide and natural ferroelectric skinny films.

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Extra resources for Ferroelectric-Gate Field Effect Transistor Memories: Device Physics and Applications

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75)/Si FeFET with L = 10 μm and W = 200 μm. Thicknesses in the gate stack were 200 nm Pt, 400 nm SBT and 13 nm HAO. b Vw − VSA extracted from the Id–Vg curves for various VSA. Modified from [11] Fig. 3 x dependence of static memory window at Vg = ±6 V of n-channel Pt/SBT/HAO(x)/Si FeFETs. Thicknesses in the gate stack were 200 nm Pt, 400 nm SBT and 14 nm HAO(x). The gate area sizes were L = 10 μm and W = 200 μm. Modified from [15] Fig. 8. Static memory window (Vw) of an FeFET was defined as a difference between two threshold voltage (Vth) values in the Id–Vg loop which were regarded as the Vg values at Id = 10−6 A for simplification in this work.

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